Deep Learning Performance Architect, CUTLASS DSL
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Recruiter screen, a technical screen mixing resume deep-dive with live coding, a hiring-manager conversation, then a panel of three to five 45–60 minute rounds: coding, systems design under hardware constraints, a domain deep-dive, and behavioral. Highly team-specific — you interview directly with the team — with C++ depth expected almost universally and decisions sometimes taking five-plus weeks after the panel.
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Are you passionate about programming languages, compiler technology, and GPU performance? Do you want to help shape the future of high-performance kernel development for AI? We are looking for outstanding engineers to build CUTLASS DSL, a Python-native language for GPU kernel development, along with the MLIR dialects and lowering passes behind it. In this role, you will also help accelerate kernel compilation while delivering performance comparable to CUTLASS C++, enabling efficient hardware-software co-design for NVIDIA's next generation of AI platforms.
What you'll be doing:
Design, develop, and optimize CUTLASS DSL, a Python-native language for high-performance GPU kernel development
Build and advance the MLIR dialects, lowering passes, and code generation flows that power the CUTLASS DSL stack
Drive innovations that improve kernel compilation speed while maintaining performance on par with CUTLASS C++
Collaborate closely with architecture, research, software product teams, and the open-source community to bring cutting-edge optimizations into real products
What we need to see:
MS, PhD, or equivalent experience in Computer Science, Software Engineering, or a related field
2+ years of relevant work experience
Excellent programming skills in Python and strong proficiency in C++
Hands-on experience with DSLs, compilers, or code generation systems
Strong command of the MLIR/LLVM stack, including IR design and pass optimization
Strong communication skills and the ability to thrive in a highly collaborative environment
Ways to stand out from the crowd:
Deep understanding of the CUDA GPU programming model, GPU microarchitecture, and performance analysis and optimization techniques
Familiarity with key high-performance computing abstractions such as Layout, Tile, MMA, and TMA in the CuTe ecosystem